SLAU367P October 2012 – April 2020 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5870 , MSP430FR5872 , MSP430FR58721 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5922 , MSP430FR59221 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5962 , MSP430FR5964 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR5969-SP , MSP430FR59691 , MSP430FR5970 , MSP430FR5972 , MSP430FR59721 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941 , MSP430FR6005 , MSP430FR6007 , MSP430FR6035 , MSP430FR6037 , MSP430FR60371 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431 , MSP430FR6045 , MSP430FR6047 , MSP430FR60471 , MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
4.5.2.4 Extended Single-Operand (Format II) Instructions
Table 4-14 lists the extended MSP430X Format II instructions.
Table 4-14 Extended Single-Operand Instructions
| Mnemonic | Operands | Operation | Status Bits(1) | ||||
|---|---|---|---|---|---|---|---|
| n | V | N | Z | C | |||
| CALLA | dst | Call indirect to subroutine (20-bit address) | – | – | – | – | |
| POPM.A | #n,Rdst | Pop n 20-bit registers from stack | 1 to 16 | – | – | – | – |
| POPM.W | #n,Rdst | Pop n 16-bit registers from stack | 1 to 16 | – | – | – | – |
| PUSHM.A | #n,Rsrc | Push n 20-bit registers to stack | 1 to 16 | – | – | – | – |
| PUSHM.W | #n,Rsrc | Push n 16-bit registers to stack | 1 to 16 | – | – | – | – |
| PUSHX(.B,.A) | src | Push 8-, 16-, or 20-bit source to stack | – | – | – | – | |
| RRCM(.A) | #n,Rdst | Rotate right Rdst n bits through carry (16-, 20-bit register) | 1 to 4 | 0 | * | * | * |
| RRUM(.A) | #n,Rdst | Rotate right Rdst n bits unsigned (16-, 20-bit register) | 1 to 4 | 0 | * | * | * |
| RRAM(.A) | #n,Rdst | Rotate right Rdst n bits arithmetically (16-, 20-bit register) | 1 to 4 | 0 | * | * | * |
| RLAM(.A) | #n,Rdst | Rotate left Rdst n bits arithmetically (16-, 20-bit register) | 1 to 4 | * | * | * | * |
| RRCX(.B,.A) | dst | Rotate right dst through carry (8-, 16-, 20-bit data) | 1 | 0 | * | * | * |
| RRUX(.B,.A) | Rdst | Rotate right dst unsigned (8-, 16-, 20-bit) | 1 | 0 | * | * | * |
| RRAX(.B,.A) | dst | Rotate right dst arithmetically | 1 | 0 | * | * | * |
| SWPBX(.A) | dst | Exchange low byte with high byte | 1 | – | – | – | – |
| SXTX(.A) | Rdst | Bit7 → bit8 ... bit19 | 1 | 0 | * | * | Z |
| SXTX(.A) | dst | Bit7 → bit8 ... MSB | 1 | 0 | * | * | Z |
– = Status bit is not affected
0 = Status bit is cleared
1 = Status bit is set
Figure 4-31 shows the addressing mode combinations for Format II instructions.
Figure 4-31 Extended Format II Instruction Format