SLAU367P October 2012 – April 2020 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5870 , MSP430FR5872 , MSP430FR58721 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5922 , MSP430FR59221 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5962 , MSP430FR5964 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR5969-SP , MSP430FR59691 , MSP430FR5970 , MSP430FR5972 , MSP430FR59721 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941 , MSP430FR6005 , MSP430FR6007 , MSP430FR6035 , MSP430FR6037 , MSP430FR60371 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431 , MSP430FR6045 , MSP430FR6047 , MSP430FR60471 , MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
4.5.2.2 Non-Register Mode Extension Word
The extension word for non-register modes is shown in Figure 4-26 and described in Table 4-12. An example is shown in Figure 4-28.
Figure 4-26 Extension Word for Non-Register Modes Table 4-12 Description of Extension Word Bits for Non-Register Modes
| Bit | Description | ||
|---|---|---|---|
| 15:11 | Extension word op-code. Op-codes 1800h to 1FFFh are extension words. | ||
| Source Bits 19:16 | The 4 MSBs of the 20-bit source. Depending on the source addressing mode, these 4 MSBs may belong to an immediate operand, an index, or to an absolute address. | ||
| A/L | Data length extension. Together with the B/W bits of the following MSP430 instruction, the AL bit defines the used data length of the instruction. | ||
| A/L | B/W | Comment | |
| 0 | 0 | Reserved | |
| 0 | 1 | 20-bit address word | |
| 1 | 0 | 16-bit word | |
| 1 | 1 | 8-bit byte | |
| 5:4 | Reserved | ||
| Destination Bits 19:16 | The 4 MSBs of the 20-bit destination. Depending on the destination addressing mode, these 4 MSBs may belong to an index or to an absolute address. | ||
NOTE
B/W and A/L bit settings for SWPBX and SXTX
| A/L | B/W | ||
| 0 | 0 | SWPBX.A, SXTX.A | |
| 0 | 1 | N/A | |
| 1 | 0 | SWPB.W, SXTX.W | |
| 1 | 1 | N/A |
Figure 4-27 Example for Extended Register or Register Instruction 
Figure 4-28 Example for Extended Immediate or Indexed Instruction