SLAU367P October 2012 – April 2020 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5870 , MSP430FR5872 , MSP430FR58721 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5922 , MSP430FR59221 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5962 , MSP430FR5964 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR5969-SP , MSP430FR59691 , MSP430FR5970 , MSP430FR5972 , MSP430FR59721 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941 , MSP430FR6005 , MSP430FR6007 , MSP430FR6035 , MSP430FR6037 , MSP430FR60371 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431 , MSP430FR6045 , MSP430FR6047 , MSP430FR60471 , MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
| PUSHM.A | Save n CPU registers (20-bit data) on the stack | ||
| PUSHM.[W] | Save n CPU registers (16-bit words) on the stack | ||
| Syntax | PUSHM.A #n,Rdst | 1 ≤ n ≤ 16 | |
| PUSHM.W #n,Rdst or PUSHM #n,Rdst | 1 ≤ n ≤ 16 | ||
| Operation | PUSHM.A: Save the 20-bit CPU register values on the stack. The SP is decremented by 4 for each register stored on the stack. The MSBs are stored first (higher address). | ||
| PUSHM.W: Save the 16-bit CPU register values on the stack. The SP is decremented by 2 for each register stored on the stack. | |||
| Description | PUSHM.A: The n CPU registers, starting with Rdst backwards, are stored on the stack. The SP is decremented by (n × 4) after the operation. The data (Rn.19:0) of the pushed CPU registers is not affected. | ||
| PUSHM.W: The n registers, starting with Rdst backwards, are stored on the stack. The SP is decremented by (n × 2) after the operation. The data (Rn.19:0) of the pushed CPU registers is not affected. | |||
| Note : This instruction does not use the extension word. | |||
| Status Bits | Status bits are not affected. | ||
| Mode Bits | OSCOFF, CPUOFF, and GIE are not affected. | ||
| Example | Save the 5 20-bit registers R9, R10, R11, R12, R13 on the stack | ||
PUSHM.A #5,R13 ; Save R13, R12, R11, R10, R9
| Example | Save the 5 16-bit registers R9, R10, R11, R12, R13 on the stack | ||
PUSHM.W #5,R13 ; Save R13, R12, R11, R10, R9