SLAU367P October 2012 – April 2020 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5870 , MSP430FR5872 , MSP430FR58721 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5922 , MSP430FR59221 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5962 , MSP430FR5964 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR5969-SP , MSP430FR59691 , MSP430FR5970 , MSP430FR5972 , MSP430FR59721 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941 , MSP430FR6005 , MSP430FR6007 , MSP430FR6035 , MSP430FR6037 , MSP430FR60371 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431 , MSP430FR6045 , MSP430FR6047 , MSP430FR60471 , MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
The RTC_C module registers are shown in Table 29-2. This table also shows which registers are key protected and which are retained during LPM3.5. The registers that are retained during LPM3.5 and given with a reset value are not reset on POR. Registers that are not retained during LPM3.5 must be restored after exit from LPM3.5.
The high-side SVS must not be disabled by software if the real-time clock feature is needed. When the high-side SVS is disabled, the RTC_C registers with LPM3.5 retention are not accessible by the CPU.
The base address for the RTC_C module registers can be found in the device-specific data sheet. The address offsets are shown in Table 29-2.
The additional registers that are available if Event/Tamper Detection is implemented are shown in Table 29-3 together with the corresponding address offsets.
If the counter mode is supported, the register aliases shown in Table 29-4 can be used to access the counter registers.
NOTE
Most registers have word or byte register access. For a generic register ANYREG, the suffix "_L" (ANYREG_L) refers to the lower byte of the register (bits 0 through 7). The suffix "_H" (ANYREG_H) refers to the upper byte of the register (bits 8 through 15).
| Offset | Acronym | Register Name | Type | Access | Reset | Key Protected | LPM3.5 Retention |
|---|---|---|---|---|---|---|---|
| 00h | RTCCTL0 | Real-Time Clock Control 0 | Read/write | Word | 9600h | yes | not retained(2) |
| 00h | RTCCTL0_L | Real-Time Clock Control 0 Low | Read/write | Byte | 00h | yes | not retained(2) |
| 01h | RTCCTL0_H | Real-Time Clock Control 0 High | Read/write | Byte | 96h | n/a | not retained(2) |
| 02h | RTCCTL13 | Real-Time Clock Control 1, 3 | Read/write | Word | 0070h | yes | high byte retained |
| 02h | RTCCTL1 | Real-Time Clock Control 1 | Read/write | Byte | 70h | yes | not retained |
| or RTCCTL13_L | |||||||
| 03h | RTCCTL3 | Real-Time Clock Control 3 | Read/write | Byte | 00h | yes | retained |
| or RTCCTL13_H | |||||||
| 04h | RTCOCAL | Real-Time Clock Offset Calibration | Read/write | Word | 0000h | yes | retained |
| 04h | RTCOCAL_L | Read/write | Byte | 00h | yes | retained | |
| 05h | RTCOCAL_H | Read/write | Byte | 00h | yes | retained | |
| 06h | RTCTCMP | Real-Time Clock Temperature Compensation | Read/write | Word | 4000h | no | partially retained |
| 06h | RTCTCMP_L | Read/write | Byte | 00h | no | partially retained | |
| 07h | RTCTCMP_H | Read/write | Byte | 40h | no | partially retained | |
| 08h | RTCPS0CTL | Real-Time Prescale Timer 0 Control | Read/write | Word | 0100h | no | not retained |
| 08h | RTCPS0CTL_L | Read/write | Byte | 00h | no | not retained | |
| 09h | RTCPS0CTL_H | Read/write | Byte | 01h | no | not retained | |
| 0Ah | RTCPS1CTL | Real-Time Prescale Timer 1 Control | Read/write | Word | 0100h | no | not retained |
| 0Ah | RTCPS1CTL_L | Read/write | Byte | 00h | no | not retained | |
| 0Bh | RTCPS1CTL_H | Read/write | Byte | 01h | no | not retained | |
| 0Ch | RTCPS | Real-Time Prescale Timer 0, 1 Counter | Read/write | Word | none | yes | retained |
| 0Ch | RT0PS | Real-Time Prescale Timer 0 Counter | Read/write | Byte | none | yes | retained |
| or RTCPS_L | |||||||
| 0Dh | RT1PS | Real-Time Prescale Timer 1 Counter | Read/write | Byte | none | yes | retained |
| or RTCPS_H | |||||||
| 0Eh | RTCIV | Real Time Clock Interrupt Vector | Read | Word | 0000h | no | not retained(2) |
| 10h | RTCTIM0 | Real-Time Clock Seconds, Minutes | Read/write | Word | undefined | yes | retained |
| 10h | RTCSEC | Real-Time Clock Seconds | Read/write | Byte | undefined | yes | retained |
| or RTCTIM0_L | |||||||
| 11h | RTCMIN | Real-Time Clock Minutes | Read/write | Byte | undefined | yes | retained |
| or RTCTIM0_H | |||||||
| 12h | RTCTIM1 | Real-Time Clock Hour, Day of Week | Read/write | Word | undefined | yes | retained |
| 12h | RTCHOUR | Real-Time Clock Hour | Read/write | Byte | undefined | yes | retained |
| or RTCTIM1_L | |||||||
| 13h | RTCDOW | Real-Time Clock Day of Week | Read/write | Byte | undefined | yes | retained |
| or RTCTIM1_H | |||||||
| 14h | RTCDATE | Real-Time Clock Date | Read/write | Word | undefined | yes | retained |
| 14h | RTCDAY | Real-Time Clock Day of Month | Read/write | Byte | undefined | yes | retained |
| or RTCDATE_L | |||||||
| 15h | RTCMON | Real-Time Clock Month | Read/write | Byte | undefined | yes | retained |
| or RTCDATE_H | |||||||
| 16h | RTCYEAR | Real-Time Clock Year(1) | Read/write | Word | undefined | yes | retained |
| 18h | RTCAMINHR | Real-Time Clock Minutes, Hour Alarm | Read/write | Word | undefined | no | retained |
| 18h | RTCAMIN | Real-Time Clock Minutes Alarm | Read/write | Byte | undefined | no | retained |
| or RTCAMINHR_L | |||||||
| 19h | RTCAHOUR | Real-Time Clock Hours Alarm | Read/write | Byte | undefined | no | retained |
| or RTCAMINHR_H | |||||||
| 1Ah | RTCADOWDAY | Real-Time Clock Day of Week, Day of Month Alarm | Read/write | Word | undefined | no | retained |
| 1Ah | RTCADOW | Real-Time Clock Day of Week Alarm | Read/write | Byte | undefined | no | retained |
| or RTCADOWDAY_L | |||||||
| 1Bh | RTCADAY | Real-Time Clock Day of Month Alarm | Read/write | Byte | undefined | no | retained |
| or RTCADOWDAY_H | |||||||
| 1Ch | BIN2BCD | Binary-to-BCD conversion register | Read/write | Word | 0000h | no | not retained |
| 1Eh | BCD2BIN | BCD-to-binary conversion register | Read/write | Word | 0000h | no | not retained |
| Offset | Acronym | Register Name | Type | Access | Reset | Key Protected | LPM3.5 Retention |
|---|---|---|---|---|---|---|---|
| 20h | RTCTCCTL0 | Real-Time Clock Time Capture Control Register 0 | Read/write | Byte | 02h | yes | retained |
| 21h | RTCTCCTL1 | Real-Time Clock Time Capture Control Register 1 | Read/write | Byte | 00h | yes | not retained |
| 22h | RTCCAP0CTL | Tamper Detect Pin 0 Control Register | Read/write | Byte | 00h | yes | not retained |
| 23h | RTCCAP1CTL | Tamper Detect Pin 1 Control Register | Read/write | Byte | 00h | yes | not retained |
| 30h | RTCSECBAK0 | Real-Time Clock Seconds Backup Register 0 | Read/write | Byte | 00h | yes | retained |
| 31h | RTCMINBAK0 | Real-Time Clock Minutes Backup Register 0 | Read/write | Byte | 00h | yes | retained |
| 32h | RTCHOURBAK0 | Real-Time Clock Hours Backup Register 0 | Read/write | Byte | 00h | yes | retained |
| 33h | RTCDAYBAK0 | Real-Time Clock Days Backup Register 0 | Read/write | Byte | 00h | yes | retained |
| 34h | RTCMONBAK0 | Real-Time Clock Months Backup Register 0 | Read/write | Byte | 00h | yes | retained |
| 36h | RTCYEARBAK0 | Real-Time Clock year Backup Register 0 | Read/write | Word | 00h | yes | retained |
| 38h | RTCSECBAK1 | Real-Time Clock Seconds Backup Register 1 | Read/write | Byte | 00h | yes | retained |
| 39h | RTCMINBAK1 | Real-Time Clock Minutes Backup Register 1 | Read/write | Byte | 00h | yes | retained |
| 3Ah | RTCHOURBAK1 | Real-Time Clock Hours Backup Register 1 | Read/write | Byte | 00h | yes | retained |
| 3Bh | RTCDAYBAK1 | Real-Time Clock Days Backup Register 1 | Read/write | Byte | 00h | yes | retained |
| 3Ch | RTCMONBAK1 | Real-Time Clock Months Backup Register 1 | Read/write | Byte | 00h | yes | retained |
| 3Eh | RTCYEARBAK1 | Real-Time Clock Year Backup Register 1 | Read/write | Word | 00h | yes | retained |
| Offset | Acronym | Register Name | Type | Access | Reset | Key Protected | LPM3.5 Retention |
|---|---|---|---|---|---|---|---|
| 10h | RTCCNT12 | Real-Time Counter 1, 2 | Read/write | Word | undefined | yes | retained |
| 10h | RTCCNT1 | Real-Time Counter 1 | Read/write | Byte | undefined | yes | retained |
| 11h | RTCCNT2 | Real-Time Counter 2 | Read/write | Byte | undefined | yes | retained |
| 12h | RTCCNT34 | Real-Time Counter 3, 4 | Read/write | Word | undefined | yes | retained |
| 12h | RTCCNT3 | Real-Time Counter 3 | Read/write | Byte | undefined | yes | retained |
| 13h | RTCCNT4 | Real-Time Counter 4 | Read/write | Byte | undefined | yes | retained |