22.3.1 1-Wire Protocol

The 1-Wire protocol signals 1 s and 0 s by holding the line low for varying lengths of time as described below. For details on the operation of this device, see Section 22.3.3 Before a command is sent, a reset is issued on the line. This is a two-part operation:

• The 1-Wire Master module drives and holds line low for > 480 µs.
• The controller waits for an answer-to-reset from one or more slaves. A slave signals a reset by pulling the line low for 60 µs to 240 µs. If the line is not sampled low, there is no slave on the bus and the NOATR bit is set in the 1-Wire Control and Status (ONEWIRECS) register. An interrupt mask can also be set to trigger an interrupt on this condition. If the line is sampled low, it indicates there are one or more slaves on the 1-Wire bus. The Master samples the line some period after releasing the line, taking into consideration the time needed for the slave to respond. The time from reset release to first sample is programmed through the ATRSAM bit in the 1-Wire Timing Override (ONEWIRETIM) register. For example, the Master could sample 10 µs after releasing the reset for 240 µs. Caution should be exercised to make sure the line has been pulled high (by a pull-up) before the Master samples to avert a bogus answer-to-reset. Because the slave may hold the line low for a longer duration than the sample time, the Master must wait for the line to go high before starting a new command. This reset protocol is used to ensure that all slaves are in a known state.

Figure 22-2 shows the details of the 1-wire reset.

Figure 22-2 1-Wire Reset Protocol

If the Master is transmitting data to the slave, the signalling is as follows:

• A 1 is signaled by the master driving and holding the line low for < 15 µs. Generally, about 6 µs is used for normal mode. The slave samples and measures the signal from falling edge and checks the line 15 µs later (or more). If line has reverted to high, the slave registers a 1 value.
• A 0 is signaled by the Master driving and holding the line low for 60 µs or more. Although the slave reads just past 15 µs, the normal mode requires the line to be low for 60 µs. If the line is still low after 15 µs, a value of 0 is registered.

Figure 22-3 depicts a 1-Wire Master transmitting a 1 to a slave. Figure 22-4shows a 1-wire Master transmitting a 0 to a slave.

Figure 22-3 1-Wire Master Transmitting a 1

Figure 22-4 1-Wire Master Transmitting a 0'

For a read from the slave, the Master drives and holds the line low for at least 1 µs (but less than 15 µs) and then releases. A typical hold time is 6 µs; in other words, it uses a transmitted 1. The read is performed as:

• A 1 is signaled by the slave when "does nothing." Thus, the slave just allows the line to come back up when the master releases it. The master samples the line at 15 µs after the low edge and the line is still high, signaling a 1.
• If the slave holds the line down for more than 5 µs (and no more than 60 µs), a 0 is signaled. The master samples the line at 15 µs after the low edge, and because the line is low still, it is treated as a 0.

Figure 22-5 depicts a Master receiving a 1 value from a slave. Figure 22-6 shows the slave sending a 0 value to a Master.

Figure 22-5 1-Wire Master Receiving a 1 Signal from a Slave

Figure 22-6 1-Wire Master Receiving a 0 Signal from a Slave