12.5.4 ACREFCTL Register (Offset = 0x10) [reset = 0x0]
Analog Comparator Reference Voltage Control (ACREFCTL)
This register specifies whether the resistor ladder is powered on as well as the range and tap.
ACREFCTL is shown in Figure 12-7 and described in Table 12-9.
Return to Summary Table.
Figure 12-7 ACREFCTL Register
| 31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| RESERVED |
| R-0x0 |
|
| 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| RESERVED |
EN |
RNG |
RESERVED |
VREF |
| R-0x0 |
R/W-0x0 |
R/W-0x0 |
R-0x0 |
R/W-0x0 |
|
Table 12-9 ACREFCTL Register Field Descriptions
| Bit |
Field |
Type |
Reset |
Description |
| 31:10 |
RESERVED |
R |
0x0 |
|
| 9 |
EN |
R/W |
0x0 |
Resistor Ladder Enable.
This bit is cleared at reset so that the internal reference consumes the least amount of power if it is not used. |
| 8 |
RNG |
R/W |
0x0 |
Resistor Ladder Range.
|
| 7:4 |
RESERVED |
R |
0x0 |
|
| 3:0 |
VREF |
R/W |
0x0 |
Resistor Ladder Voltage Ref.
The VREF bit field specifies the resistor ladder tap that is passed through an analog multiplexer.
The voltage corresponding to the tap position is the internal reference voltage available for comparison.
See for some output reference voltage examples. |