31-17 |
RESERVED |
R |
0x0 |
|
16 |
BUSY |
R |
0x0 |
ADC Busy.
To use the BUSY bit, the ADC Event Multiplexer Select (ADCEMUX) register must be programmed such that no trigger is selected (bit field encoding is 0xE).
The NEVER encoding in the ADCEMUX register allows the ADC to safely be put in Deep-Sleep mode.
0x0 = ADC is idle
0x1 = ADC is busy
|
15-12 |
RESERVED |
R |
0x0 |
|
11 |
ADEN3 |
R/W |
0x0 |
ADC SS3 DMA Enable.
0x0 = DMA for Sample Sequencer 3 is disabled.
0x1 = DMA for Sample Sequencer 3 is enabled.
|
10 |
ADEN2 |
R/W |
0x0 |
ADC SS2 DMA Enable.
0x0 = DMA for Sample Sequencer 2 is disabled.
0x1 = DMA for Sample Sequencer 2 is enabled.
|
9 |
ADEN1 |
R/W |
0x0 |
ADC SS1 DMA Enable.
0x0 = DMA for Sample Sequencer 1 is disabled.
0x1 = DMA for Sample Sequencer 1 is enabled.
|
8 |
ADEN0 |
R/W |
0x0 |
ADC SS1 DMA Enable.
0x0 = DMA for Sample Sequencer 1 is disabled.
0x1 = DMA for Sample Sequencer 1 is enabled.
|
7-4 |
RESERVED |
R |
0x0 |
|
3 |
ASEN3 |
R/W |
0x0 |
ADC SS3 Enable.
0x0 = Sample Sequencer 3 is disabled.
0x1 = Sample Sequencer 3 is enabled.
|
2 |
ASEN2 |
R/W |
0x0 |
ADC SS2 Enable.
0x0 = Sample Sequencer 2 is disabled.
0x1 = Sample Sequencer 2 is enabled.
|
1 |
ASEN1 |
R/W |
0x0 |
ADC SS1 Enable.
0x0 = Sample Sequencer 1 is disabled.
0x1 = Sample Sequencer 1 is enabled.
|
0 |
ASEN0 |
R/W |
0x0 |
ADC SS0 Enable.
0x0 = Sample Sequencer 0 is disabled.
0x1 = Sample Sequencer 0 is enabled.
|