| 31-24 |
RESERVED |
R |
0x0 |
|
| 23 |
DCTRIG7 |
W |
0x0 |
Digital Comparator Trigger 7.
When the trigger has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the trigger, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
After setting this bit, software should wait until the bit clears before continuing.
0x0 = No effect
0x1 = Resets the Digital Comparator 7 trigger unit to its initial conditions.
|
| 22 |
DCTRIG6 |
W |
0x0 |
Digital Comparator Trigger 6.
When the trigger has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the trigger, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 6 trigger unit to its initial conditions.
|
| 21 |
DCTRIG5 |
W |
0x0 |
Digital Comparator Trigger 5.
When the trigger has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the trigger, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 5 trigger unit to its initial conditions.
|
| 20 |
DCTRIG4 |
W |
0x0 |
Digital Comparator Trigger 4.
When the trigger has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the trigger, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 4 trigger unit to its initial conditions.
|
| 19 |
DCTRIG3 |
W |
0x0 |
Digital Comparator Trigger 3.
When the trigger has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the trigger, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 3 trigger unit to its initial conditions.
|
| 18 |
DCTRIG2 |
W |
0x0 |
Digital Comparator Trigger 2.
When the trigger has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the trigger, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 2 trigger unit to its initial conditions.
|
| 17 |
DCTRIG1 |
W |
0x0 |
Digital Comparator Trigger 1.
When the trigger has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the trigger, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 1 trigger unit to its initial conditions.
|
| 16 |
DCTRIG0 |
W |
0x0 |
Digital Comparator Trigger 0.
When the trigger has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the trigger, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 0 trigger unit to its initial conditions.
|
| 15-8 |
RESERVED |
R |
0x0 |
|
| 7 |
DCINT7 |
W |
0x0 |
Digital Comparator Interrupt 7.
When the interrupt has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the interrupt, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 7 interrupt unit to its initial conditions.
|
| 6 |
DCINT6 |
W |
0x0 |
Digital Comparator Interrupt 6.
When the interrupt has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the interrupt, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 6 interrupt unit to its initial conditions.
|
| 5 |
DCINT5 |
W |
0x0 |
Digital Comparator Interrupt 5.
When the interrupt has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the interrupt, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 5 interrupt unit to its initial conditions.
|
| 4 |
DCINT4 |
W |
0x0 |
Digital Comparator Interrupt 4.
When the interrupt has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the interrupt, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 4 interrupt unit to its initial conditions.
|
| 3 |
DCINT3 |
W |
0x0 |
Digital Comparator Interrupt 3.
When the interrupt has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the interrupt, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 3 interrupt unit to its initial conditions.
|
| 2 |
DCINT2 |
W |
0x0 |
Digital Comparator Interrupt 2.
When the interrupt has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the interrupt, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 2 interrupt unit to its initial conditions.
|
| 1 |
DCINT1 |
W |
0x0 |
Digital Comparator Interrupt 1.
When the interrupt has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the interrupt, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 1 interrupt unit to its initial conditions.
|
| 0 |
DCINT0 |
W |
0x0 |
Digital Comparator Interrupt 0.
When the interrupt has been cleared, this bit is automatically cleared.
Because the digital comparators use the current and previous ADC conversion values to determine when to assert the interrupt, it is important to reset the digital comparator to initial conditions when starting a new sequence so that stale data is not used.
0x0 = No effect
0x1 = Resets the Digital Comparator 0 interrupt unit to its initial conditions.
|