10.5.5 ADCOSTAT Register (Offset = 0x10) [reset = 0x0]
ADC Overflow Status (ADCOSTAT)
This register indicates overflow conditions in the sample sequencer FIFOs. Once the overflow condition has been handled by software, the condition can be cleared by writing a 1 to the corresponding bit position.
ADCOSTAT is shown in Figure 10-19 and described in Table 10-12.
Return to Summary Table.
Figure 10-19 ADCOSTAT Register
| 31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| RESERVED |
| R-0x0 |
|
| 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| RESERVED |
OV3 |
OV2 |
OV1 |
OV0 |
| R-0x0 |
R/W1C-0x0 |
R/W1C-0x0 |
R/W1C-0x0 |
R/W1C-0x0 |
|
Table 10-12 ADCOSTAT Register Field Descriptions
| Bit |
Field |
Type |
Reset |
Description |
| 31-4 |
RESERVED |
R |
0x0 |
|
| 3 |
OV3 |
R/W1C |
0x0 |
SS3 FIFO Overflow.
This bit is cleared by writing a 1.
0x0 = The FIFO has not overflowed.
0x1 = The FIFO for Sample Sequencer 3 has hit an overflow condition, meaning that the FIFO is full and a write was requested. When an overflow is detected, the most recent write is dropped.
|
| 2 |
OV2 |
R/W1C |
0x0 |
SS2 FIFO Overflow.
This bit is cleared by writing a 1.
0x0 = The FIFO has not overflowed.
0x1 = The FIFO for Sample Sequencer 2 has hit an overflow condition, meaning that the FIFO is full and a write was requested. When an overflow is detected, the most recent write is dropped.
|
| 1 |
OV1 |
R/W1C |
0x0 |
SS1 FIFO Overflow.
This bit is cleared by writing a 1.
0x0 = The FIFO has not overflowed.
0x1 = The FIFO for Sample Sequencer 1 has hit an overflow condition, meaning that the FIFO is full and a write was requested. When an overflow is detected, the most recent write is dropped.
|
| 0 |
OV0 |
R/W1C |
0x0 |
SS0 FIFO Overflow.
This bit is cleared by writing a 1.
0x0 = The FIFO has not overflowed.
0x1 = The FIFO for Sample Sequencer 0 has hit an overflow condition, meaning that the FIFO is full and a write was requested. When an overflow is detected, the most recent write is dropped.
|