10.5.30 ADCSSCTL3 Register (Offset = 0xA4) [reset = 0x0]
ADC Sample Sequence Control 3 (ADCSSCTL3)
This register contains the configuration information for a sample executed with Sample Sequencer 3. This register is 4 bits wide and contains information for one possible sample. See the ADCSSCTL0 register in Section 10.5.16 for detailed bit descriptions.
NOTE
When configuring a sample sequence in this register, the END0 bit must be set.
ADCSSCTL3 is shown in Figure 10-44 and described in Table 10-39.
Return to Summary Table.
Figure 10-44 ADCSSCTL3 Register
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
RESERVED |
R-0x0 |
|
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
RESERVED |
R-0x0 |
|
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
RESERVED |
R-0x0 |
|
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
RESERVED |
TS0 |
IE0 |
END0 |
D0 |
R-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
|
Table 10-39 ADCSSCTL3 Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
31-4 |
RESERVED |
R |
0x0 |
|
3 |
TS0 |
R/W |
0x0 |
1st Sample Temp Sensor Select.
0x0 = The input pin specified by the ADCSSMUXn register is read during the first sample of the sample sequence.
0x1 = The temperature sensor is read during the first sample of the sample sequence.
|
2 |
IE0 |
R/W |
0x0 |
Sample Interrupt Enable.
It is legal to have multiple samples within a sequence generate interrupts.
0x0 = The raw interrupt is not asserted to the interrupt controller.
0x1 = The raw interrupt signal (INR0 bit) is asserted at the end of this sample's conversion. If the MASK0 bit in the ADCIM register is set, the interrupt is promoted to the interrupt controller.
|
1 |
END0 |
R/W |
0x0 |
End of Sequence.
This bit must be set before initiating a single sample sequence.
0x0 = Sampling and conversion continues.
0x1 = This is the end of sequence.
|
0 |
D0 |
R/W |
0x0 |
Sample Differential Input Select.
Because the temperature sensor does not have a differential option, this bit must not be set when the TS0 bit is set.
0x0 = The analog inputs are not differentially sampled.
0x1 = The analog input is differentially sampled. The corresponding ADCSSMUXn nibble must be set to the pair number "i", where the paired inputs are "2i and 2i+1".
|