SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0), offset 0x048
ADC Sample Sequence Result FIFO 1 (ADCSSFIFO1), offset 0x068
ADC Sample Sequence Result FIFO 2 (ADCSSFIFO2), offset 0x088
ADC Sample Sequence Result FIFO 3 (ADCSSFIFO3), offset 0x0A8
This register contains the conversion results for samples collected with the sample sequencer (the ADCSSFIFO0 register is used for Sample Sequencer 0, ADCSSFIFO1 for Sequencer 1, ADCSSFIFO2 for Sequencer 2, and ADCSSFIFO3 for Sequencer 3). Reads of this register return conversion result data in the order sample 0, sample 1, and so on, until the FIFO is empty. If the FIFO is not properly handled by software, overflow and underflow conditions are registered in the ADCOSTAT and ADCUSTAT registers.
ADCSSFIFOn is shown in Figure 10-31 and described in Table 10-24.
Return to Summary Table.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | DATA | ||||||||||||||||||||||||||||||
| R-0x0 | R-X | ||||||||||||||||||||||||||||||