SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
ADC Sample Sequence 3 Sample and Hold Time (ADCSSTSH3)
This register controls the sample period size for the sample in sequencer 3. The sample and hold period select specifies the time allocated to the sample and hold circuit as shown by the encodings inTable 10-2
NOTE
If sampling the internal temperature sensor, the sample and hold width should be at least 16 ADC clocks (TSHn = 0x4).
TSHn Encoding | NSH |
---|---|
0x0 | 4 |
0x1 | Reserved |
0x2 | 8 |
0x3 | Reserved |
0x4 | 16 |
0x5 | Reserved |
0x6 | 32 |
0x7 | Reserved |
0x8 | 64 |
0x9 | Reserved |
0xA | 128 |
0xB | Reserved |
0xC | 256 |
0xD-0xF | Reserved |
ADCSSTSH3 is shown in Figure 10-48 and described in Table 10-44.
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | TSH0 | ||||||||||||||||||||||||||||||
R-0x0 | R/W-0x0 | ||||||||||||||||||||||||||||||