SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
This register contains the 32-bit key data for the AES module. This value can be expanded to 256 bits depending on the mode of operation. Table 9-7 describes the type of key that is held in each register.
NOTE
Reads return zeros.
| Register Name | Address Offset | Description |
|---|---|---|
| AES_KEY2_6 | 0x000 | Secure XTS second key / CBC-MAC third key |
| AES_KEY2_7 | 0x004 | Secure XTS second key (MSW for 256-bit key) / CBC-MAC third key (MSW) |
| AES_KEY2_4 | 0x008 | Secure XTS / CCM second key / CBC-MAC third key (LSW) |
| AES_KEY2_5 | 0x00C | Secure XTS second key (MSW for 192-bit key) / CBC-MAC third key |
| AES_KEY2_2 | 0x010 | Secure XTS / CCM / CBC-MAC second key / Hash Key input |
| AES_KEY2_3 | 0x014 | Secure XTS second key (MSW for 128-bit key) + CCM/CBC-MAC second key (MSW) / Hash Key input (MSW) |
| AES_KEY2_0 | 0x018 | Secure XTS / CCM / CBC-MAC second key (LSW) / Hash Key input (LSW) |
| AES_KEY2_1 | 0x01C | Secure XTS / CCM / CBC-MAC second key / Hash Key input |
| AES_KEY1_6 | 0x020 | Secure Key (LSW for 256-bit key) |
| AES_KEY1_7 | 0x024 | Secure Key (MSW for 256-bit key) |
| AES_KEY1_4 | 0x028 | Secure Key (LSW for 192-bit key) |
| AES_KEY1_5 | 0x02C | Secure Key (MSW for 192-bit key) |
| AES_KEY1_2 | 0x030 | Secure Key |
| AES_KEY1_3 | 0x034 | Secure Key (MSW for 128-bit key) |
| AES_KEY1_0 | 0x038 | Secure Key (LSW for 128-bit key) |
| AES_KEY1_1 | 0x03C | Secure Key |
AES_KEYn_n is shown in Figure 9-14 and described in Table 9-8.
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