| 31-13 |
RESERVED |
R |
0x0 |
|
| 12 |
K3 |
R/W |
0x0 |
K3 Select
0x0 = A regular cryptographic operation is performed.
0x1 = The K3 key is used as the key for the selected cryptographic operation. The key size should be 128-bits.This bit may only be set to one if the KEYENC bit of this register is cleared to zero.
|
| 11 |
KEYENC |
R/W |
0x0 |
Key Encoding
0x0 = A regular cryptographic operation is performed
0x1 = The KEK key (see KEKMODE bit) is XOR-ed with a predefined constant value before it is used as a key for the selected cryptographic operation.
|
| 10 |
RESERVED |
R |
0x0 |
|
| 9 |
MAP_CONTEXT_OUT_ON_DATA_OUT |
R/W |
0x0 |
Map Context Out on Data Out Enable
0x0 = Original context out bit values are used.
0x1 = The DMA_REQ_CONTEXT_OUT_EN bit in this register and the CONTEXT_OUT bit in the AES_IRQENABLE register are mapped on the corresponding DATA_OUT request bits. In this case, the original CONTEXT_OUT bit values are ignored.
|
| 8 |
DMA_REQ_CONTEXT_OUT_EN |
R/W |
0x0 |
DMA Request Context Out Enable.
If set to 1€™, the DMA context output request is enabled (for context data out, for example, TAG for authentication modes).
The dma_done indication bits in AES_DMARIS register, at CCM module offset 0x024, identify to the application when the DMA transfer is complete.
0x0 = DMA disabled for context output request.
0x1 = DMA enabled for context output request.
|
| 7 |
DMA_REQ_CONTEXT_IN_EN |
R/W |
0x0 |
DMA Request Context In Enable.
The dma_done indication bits in AES_DMARIS register, at CCM offset 0x024, identify to the application when the DMA transfer is complete.
0x0 = DMA disabled for context input request.
0x1 = DMA enabled for context input request.
|
| 6 |
DMA_REQ_DATA_OUT_EN |
R/W |
0x0 |
DMA Request Data Out Enable.
The dma_done indication bits in AES_DMARIS register, at CCM offset 0x024, identify to the application when the DMA transfer is complete.
0x0 = DMA disabled for data output request.
0x1 = DMA enabled for data output request.
|
| 5 |
DMA_REQ_DATA_IN_EN |
R/W |
0x0 |
DMA Request Data In Enable.
The dma_done indication bits in AES_DMARIS register, at CCM module offset 0x024, identify to the application when the DMA transfer is complete.
0x0 = DMA disabled for data input request.
0x1 = DMA enabled for data input request.
|
| 4-2 |
RESERVED |
R |
0x0 |
|
| 1 |
SOFTRESET |
R/W |
0x0 |
Soft reset
0x0 = No operation
0x1 = Start soft reset sequence
|
| 0 |
RESERVED |
R |
0x1 |
|