4.2.13 ALTCLKCFG Register (Offset = 0x138) [reset = 0x0]
Alternate Clock Configuration (ALTCLKCFG)
The ALTCLKCFG register specifies the alternate clock source used by many of the peripherals.
ALTCLKCFG is shown in Figure 4-19 and described in Table 4-24.
Return to Summary Table.
Figure 4-19 ALTCLKCFG Register
| 31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| RESERVED |
| R-0x0 |
|
| 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| RESERVED |
ALTCLK |
| R-0x0 |
R/W-0x0 |
|
Table 4-24 ALTCLKCFG Register Field Descriptions
| Bit |
Field |
Type |
Reset |
Description |
| 31-4 |
RESERVED |
R |
0x0 |
|
| 3-0 |
ALTCLK |
R/W |
0x0 |
Alternate Clock Source
This provides a clock source of numerous frequencies to the general-purpose timer, SSI, and UART modules. If the Hibernation real-time clock output is selected, the clock source must also be enabled in the Hibernation module.
0x0 = Precision Internal Oscillator (PIOSC)
0x1 = Reserved
0x2 = Reserved
0x3 = Hibernation module real-time clock output (RTCOSC)
0x4 = Low-frequency internal oscillator (LFIOSC)
|