SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
The Ethernet PHY can auto-negotiate to operate in 10Base-T or 100Base-TX. When the Ethernet PHY is enabled or on the deassertion of software reset, the Ethernet MAC Peripheral Configuration Register (EMACPC) register, offset 0xFC4, is configured such that auto-negotiation is enabled and the auto negotiation mode (ANMODE) bit field is programmed to 10Base-T, Half/Full-Duplex 100Base-TX, Half/Full-Duplex. With auto-negotiation enabled, the PHY negotiates with the link partner to determine the speed and duplex mode with which to operate. If the link partner is unable to auto-negotiate, the PHY goes into parallel-detect mode to determine the speed of the link partner. Under parallel-detect mode, the duplex mode is fixed at half-duplex. The PHY supports four different Ethernet protocols (10Mbs Half-Duplex, 10Mbs Full-Duplex, 100Mbs Half-Duplex, and 100Mbs Full-Duplex). Auto-Negotiation selects the highest performance protocol based on the advertised ability of the Link Partner. If a different auto-negotiation configuration is required other than the reset initialization values, the application can customize the configuration of the ANEN bit and ANMODE bit field as described in Section 15.5.1.2. The values of ANEN and ANMODE determine whether the PHY is forced into a specific mode, or if Auto-negotiation advertises a specific ability (or abilities) as listed in Table 15-20 and Table 15-21:
ANEN Value | ANMODE | Forced Mode |
---|---|---|
0 | 0x0 | 10Base-T, Half-Duplex |
0 | 0x1 | 10Base-T, Full-Duplex |
0 | 0x2 | 100Base-TX, Half-Duplex |
0 | 0x3 | 100Base-TX, Full-Duplex |
ANEN Value | ANMODE | Advertised Mode |
---|---|---|
1 | 0x0 | 10Base-T, Half/Full-Duplex |
1 | 0x1 | 100Base-TX, Half/Full-Duplex |
1 | 0x2 | 10Base-T, Half Duplex 100Base-TX, Half Duplex |
1 | 0x3 | 10Base-T, Half/Full-Duplex 100Base-TX, Half/Full-Duplex |