22.3.5 Command Protocol
The standard 1-Wire protocol has commands to be used after a reset. These commands normally include slave selection and detection. However, many 1-Wire buses only have one slave, and in that case, those mechanisms can be skipped. If slave management is needed, a small software stack can be used to handle these operations. Other protocols can also be easily supported, whether byte-oriented (as normal) or bit-oriented. To support an alternative protocol, it is usually necessary to override some or all of the timing and may be necessary to disable the answer-to-reset mechanism using the SKATR bit in the ONEWIRECS register. The module is designed to support the most common uses of 1-Wire, including a mechanism to allow a reset followed by an operation of 1, 2, 3, or 4 bytes through the SZ bit in the ONEWIRECS register. Additionally, the OP bit supports a write/read model to allow a mix of write and read in one transaction. Although nominally mixed mode allows for a mix of write and read bytes, it can be used down to the bit level.
The following represents some typical operation flows:
- To only send a reset, the RST bit of the ONEWIRECS register is set, performing a reset and triggering an interrupt if enabled. If there is no answer-to-reset, the NOATR status bit is set and the corresponding interrupt bit can be set as well.
- The SZ and OP fields of the ONEWIRECS register are used to perform a write, a read, or a combination. For small transactions, the SZ encoding can be programmed for processing of up to 4 bytes in one transaction. For larger transactions, the OP field can be used multiple times. The OPC raw interrupt bit is used to notify when a transaction is complete.
- To perform a reset and then a transaction, both the RST and OP and SZ fields of the ONEWIRECS register are configured. The reset runs to completion and then the transaction starts. The interrupt is used to notify when both are done.
To setup a read, write or mixed transaction, the following configuration must occur:
- For writes, the 1-Wire Data Write (ONEWIREDATW) register must first be written with one, two, three or four bytes to send (as a word). Next the ONEWIRECS register is configured as described above.
- For reads, the ONEWIRECS register is written as described above. Then, when the transaction is complete, the 1-Wire Data Read (ONEWIREDATR) register is read to collect the one, two, three, or four bytes that were received (as a word).
- For a R/W combination, the ONEWIREDATW register is written with one, two, three or four bytes to write or read. Then, the ONEWIRECS register is configured as described above. As the data is transferred from the ONEWIREDATW register to the 1-Wire line, any 1 that is transmitted creates a read that is registered in the ONEWIREDATR register. When the entire transaction is complete, the ONEWIREDATR register can be read to collect the bytes that were received by the 1-Wire Master. A ONEWIREDATR register bit contains a 0 for any bit that was written as a 0, a 1 for any bit that was written as a 1 or any bit not modified by the slave (may have been intentional 1 or ignored) and a 0 for any bit written as a 1 but read back as a '0.'