SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
This example transfers bytes from the peripheral's receive FIFO register into two memory buffers of 64 bytes each. As data is received, when one buffer is full, the µDMA controller switches to use the other.
To use Ping-Pong buffering, both primary and alternate channel control structures must be used. The primary control structure for channel 8 is at offset 0x080 of the channel control table, and the alternate channel control structure is at offset 0x280. The channel control structures for channel 8 are located at the offsets shown inTable 8-10.
| Offset | Description |
|---|---|
| Control Table Base + 0x080 | Channel 8 primary source end pointer |
| Control Table Base + 0x084 | Channel 8 primary destination end pointer |
| Control Table Base + 0x088 | Channel 8 primary control word |
| Control Table Base + 0x280 | Channel 8 alternate source end pointer |
| Control Table Base + 0x284 | Channel 8 alternate destination end pointer |
| Control Table Base + 0x288 | Channel 8 alternate control word |