SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Software can offload the CRC and checksum task to the CRC checksum engine accelerator. The accelerator has registers that need to be programmed to initiate processing. These registers should be fed with data to calculate CRC/CSUM. Software should configure the µDMA channel for data movement through the DMA Channel Map Select n (DMACHMAPn) register in the µDMA module. Further µDMA configuration guidelines are available in Section 8.
The starting seed for the CRC and checksum operation is programmed in the CRC SEED/Context (CRCSEED) register at offset 0x410. Depending on the encoding of the INIT field in the CRCCTRL register, the value of the SEED field can initialized to any one of the following:
When the operation is complete, software should read the result from the CRC Post Processing Result (CRCRSLTPP) register, offset 0x418, and a software channel µDMA interrupt should be used to identify completion.