8.6.19 DMACHMAP1 Register (Offset = 0x514) [reset = 0x0]
DMA Channel Map Select 1 (DMACHMAP1)
Each 4-bit field of the DMACHMAP1 register configures the µDMA channel assignment as specified in .
DMACHMAP1 is shown in Figure 8-28 and described in Table 8-38.
Return to Summary Table.
Figure 8-28 DMACHMAP1 Register
| 31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| CH15SEL |
CH14SEL |
CH13SEL |
CH12SEL |
| R/W-0h |
R/W-0h |
R/W-0h |
R/W-0h |
|
| 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| CH11SEL |
CH10SEL |
CH9SEL |
CH8SEL |
| R/W-0h |
R/W-0h |
R/W-0h |
R/W-0h |
|
Table 8-38 DMACHMAP1 Register Field Descriptions
| Bit |
Field |
Type |
Reset |
Description |
| 31-28 |
CH15SEL |
R/W |
0x0 |
µDMA Channel 15 Source Select
See for channel assignments.
|
| 27-24 |
CH14SEL |
R/W |
0x0 |
µDMA Channel 14 Source Select
See for channel assignments.
|
| 23-20 |
CH13SEL |
R/W |
0x0 |
µDMA Channel 13 Source Select
See for channel assignments.
|
| 19-16 |
CH12SEL |
R/W |
0x0 |
µDMA Channel 12 Source Select
See for channel assignments.
|
| 15-12 |
CH11SEL |
R/W |
0x0 |
µDMA Channel 11 Source Select
See for channel assignments.
|
| 11-8 |
CH10SEL |
R/W |
0x0 |
µDMA Channel 10 Source Select
See for channel assignments.
|
| 7-4 |
CH9SEL |
R/W |
0x0 |
µDMA Channel 9 Source Select
See for channel assignments.
|
| 3-0 |
CH8SEL |
R/W |
0x0 |
µDMA Channel 8 Source Select
See for channel assignments.
|