SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Ethernet MAC MMC Control (EMACMMCCTRL)
The MMC Control register establishes the operating mode of the management counters.
The CNTRST bit has higher priority than the CNTPRST. Therefore, when the software tries to set both bits in the same write cycle, all counters are cleared and the CNTPRST is not set.
EMACMMCCTRL is shown in Figure 15-40 and described in Table 15-49.
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0x0 | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0x0 | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | UCDBC | ||||||
R-0x0 | R/W-0x0 | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | CNTPRSTLVL | CNTPRST | CNTFREEZ | RSTONRD | CNTSTPRO | CNTRST | |
R-0x0 | R/W-0x0 | R/W-0x0 | R/W-0x0 | R/W-0x0 | R/W-0x0 | R/W-0x0 | |