SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Ethernet MAC PPS0 Width (EMACPPS0WIDTH)
The MAC PPS0 Width (EMACPPS0WIDTH) register contains the number of units of sub-second increment value between the rising and corresponding falling edges of the EN0PPS output signal.
NOTE
The PTP reference clock referred to below is MOSC clock in course update mode and in fine correction mode, is the clock tick at which the system time gets updated.
EMACPPS0WIDTH is shown in Figure 15-68 and described in Table 15-78.
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PPS0WIDTH | |||||||||||||||||||||||||||||||
R/W-0x0 | |||||||||||||||||||||||||||||||