SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Ethernet MAC Receive Frame Count for Good and Bad Frames (EMACRXCNTGB)
This register maintains the number of received good and bad frames.
NOTE
This counter is reset to all zeros by setting the CNTRST bit in the Ethernet MAC MMC Control (EMACMMCCTRL).
EMACRXCNTGB is shown in Figure 15-49 and described in Table 15-58.
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RXFRMGB | |||||||||||||||||||||||||||||||
R-0x0 | |||||||||||||||||||||||||||||||