SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Ethernet PHY BIST Control and Status 2 - MR28 (EPHYBICSR2)
This register allows programming the length of the generated packets in bytes for the BIST mechanism
EPHYBICSR2 is shown in Figure 15-114 and described in Table 15-126.
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15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | PKTLENGTH | ||||||||||||||
R-0x0 | R/W-0x5EE | ||||||||||||||