15.7.20 EPHYRXERCNT Register (Address = 0x15) [reset = 0x0]
Ethernet PHY Receive Error Count - MR21 (EPHYRXERCNT)
This counter provides information required to implement the Symbol Error During Carrier attribute within the PHY managed object class of Clause 30 of the IEEE 802.3u specification.
EPHYRXERCNT is shown in Figure 15-108 and described in Table 15-120.
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Figure 15-108 EPHYRXERCNT Register
| 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| RXERRCNT |
| R-0x0 |
|
Table 15-120 EPHYRXERCNT Register Field Descriptions
| Bit |
Field |
Type |
Reset |
Description |
| 15-0 |
RXERRCNT |
R |
0x0 |
Receive Error Count. When a valid carrier is present (while EN0RXDV is active), and there is at least one occurrence of an invalid data symbol, this 16-bit counter increments for each receive error detected. The EPHYRXERCNT counter does not count in MII loopback mode. The counter stops when it reaches its maximum count of 0xFFFF. When the counter exceeds half-full (0x7FFF), an interrupt is generated. This register is cleared on read.
|