11.3.16.2 Example for Bit Timing at Low Baud Rate
In this example, the frequency of the CAN clock is 50 MHz, and the bit rate is 100 kbps.
Equation 24. bit time = 10 µs = n × tq= 10 × tq
Equation 25. tq= 1 µs
Equation 26. tq= (Baud rate Prescaler) / CAN Clock
Equation 27. Baud rate Prescaler = tq × CAN Clock
Equation 28. Baud rate Prescaler = 1E–6 × 50E6 = 50
Equation 29. tSync = 1 × tq= 1 µs
\\fixed at 1 time quanta
Equation 30. delay of bus driver 200 ns
Equation 31. delay of receiver circuit 80 ns
Equation 32. delay of bus line (40 m) 220 ns
Equation 33. tProp 1 µs = 1 × tq
\\1 µs is next integer multiple of tq
Equation 34. bit time = tSync + tTSeg1 + tTSeg2 = 10 × tq
Equation 35. bit time = tSync + tProp + tPhase 1 + tPhase2
Equation 36. tPhase 1 + tPhase2 = bit time – tSync – tProp
Equation 37. tPhase 1 + tPhase2 = (10 × tq) – (1 × tq) – (1 × tq)
Equation 38. tPhase 1 + tPhase2 = 8 × tq
Equation 39. tPhase1 = 4 × tq
Equation 40. tPhase2 = 4 × tq
\\tPhase1 = tPhase2
Equation 41. tTSeg1 = tProp + tPhase1
Equation 42. tTSeg1 = (1 × tq) + (4 × tq)
Equation 43. tTSeg1 = 5 × tq
Equation 44. tTSeg2 = tPhase2
Equation 45. tTSeg2 = (Information Processing Time + 4) × tq
Equation 46. tTSeg2 = 4 × tq
\\Assumes IPT = 0
Equation 47. tSJW = 4 × tq
\\Least of 4, Phase1, and Phase2
Table 11-5 CANBIT Register Values for Low Baud Rate Example
| Bit |
Value |
| TSEG2 |
= TSeg2 – 1
= 4 – 1
= 3 |
| TSEG1 |
= TSeg1 – 1
= 5 – 1
= 4 |
| SJW |
= SJW – 1
= 4 – 1
= 3 |
| BRP |
= Baud rate prescaler – 1
= 50 – 1
= 49 |
The final value programmed into the CANBIT register = 0x34F1.