SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Table 16-2 defines how EPI module signals should be connected to SDRAMs. The table applies when using a x16 SDRAM up to 512 megabits. The EPI signals must use 8-mA drive when interfacing to SDRAM, see Section 17.5.13. Any unused EPI controller signals can be used as GPIOs or another alternate function.
EPI Signal | SDRAM Signal (1) | |
---|---|---|
EPI0S0 | A0 | D0 |
EPI0S1 | A1 | D1 |
EPI0S2 | A2 | D2 |
EPI0S3 | A3 | D3 |
EPI0S4 | A4 | D4 |
EPI0S5 | A5 | D5 |
EPI0S6 | A6 | D6 |
EPI0S7 | A7 | D7 |
EPI0S8 | A8 | D8 |
EPI0S9 | A9 | D9 |
EPI0S10 | A10 | D10 |
EPI0S11 | A11 | D11 |
EPI0S12 | A12 (2) | D12 |
EPI0S13 | BA0 | D13 |
EPI0S14 | BA1 | D14 |
EPI0S15 | D15 | |
EPI0S16 | DQML | |
EPI0S17 | DQMH | |
EPI0S18 | CASn | |
EPI0S19 | RASn | |
EPI0S20-EPI0S27 | Not used | |
EPI0S28 | WEn | |
EPI0S29 | CSn | |
EPI0S30 | CKE | |
EPI0S31 | CLK |