SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Flash Memory Address (FMA)
During a write operation, this register contains a 4-byte-aligned address and specifies where the data is written. During erase operations for flash space that is not user configurable (that is, FMPREn, FMPPEn, USER_REGn, BOOTCFG), this register contains a 16KB-aligned CPU byte address and specifies which block is erased. Note that the alignment requirements must be met by software or the results of the operation are unpredictable.
FMA is shown in Figure 7-9 and described in Table 7-8.
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | OFFSET | ||||||||||||||||||||||||||||||
R-0x0 | R/W-0x0 | ||||||||||||||||||||||||||||||