4.1.5.1 Fundamental Clock Sources

Multiple clock sources are available for use in the microcontroller. The Run and Sleep Mode Configuration (RSCLKCFG) register can be used to configure the required clock source for the device after POR, as well as the system clock divisor encodings. The available clock sources are:

• Precision Internal Oscillator (PIOSC)

The PIOSC is an on-chip clock source that the microcontroller uses during and following POR. The PIOSC is the clock source in effect at the start of reset vector fetch and the start of code application execution. The PIOSC does not require the use of any external components and provides a clock that is 16 MHz ± f_PIOSC across temperature (see the PIOSC specifications in the device-specific data sheet). The PIOSC allows for a reduced system cost for applications in which a high-precision clock source is not required. If the main oscillator is required, software must enable the main oscillator following reset and allow the main oscillator to stabilize before changing the clock reference. If the Hibernation module clock source is a 32.768-kHz oscillator, the PIOSC can be trimmed by software based on a reference clock for increased accuracy. Regardless of whether or not the PIOSC is the source for the system clock, the PIOSC can be configured to be an alternate clock source for some of the peripherals. See Section 4.1.5.2.1 for more information on peripherals that can use the PIOSC as an alternate clock.

• Main Oscillator (MOSC)

The MOSC provides a frequency-accurate clock sourced by one of two means: an external single-ended clock source is connected to the OSC0 input pin, or an external crystal is connected across the OSC0 input and OSC1 output pins. If the PLL is being used, the frequency of the crystal can be 5 MHz to 25 MHz (inclusive). See Table 4-6 for recommended crystal values and PLL register programming. If the PLL is not being used, the frequency of the crystal can be 4 MHz to 25 MHz. The single-ended clock source range is from DC through the specified speed of the microcontroller.

• Low-Frequency Internal Oscillator (LFIOSC)

The LFIOSC provides a nominal frequency of 33 kHz with (see the device-specific data sheet for specifications). The LFIOSC is intended for use during deep-sleep power-saving modes. This power-savings mode provides reduced internal switching and the ability to power down the MOSC or PIOSC while in deep-sleep mode through configuration of the Deep Sleep Clock Configuration (DSCLKCFG) register.

• Hibernation Module RTC Oscillator (RTCOSC) Clock Source

The Hibernation module provides a multiplexed output of two clocks to the System Control module: an external 32.768-kHz clock or a low-frequency clock. The Hibernation module can be clocked by a 32.768-kHz oscillator connected to the XOSC0 pin. The 32.768-kHz oscillator can be used for the system clock, thus eliminating the need for an additional crystal or oscillator. Alternatively, the Hibernation module contains a low-frequency oscillator (HIB LFIOSC), which is intended to provide the system with a real-time clock source and may also provide an accurate source of deep-sleep or hibernate mode power savings. The HIB LFIOSC is a different clock source than the LFIOSC. See the device-specific data sheet for more information on frequency range.

The internal system clock (SysClk), is derived from any of the preceding sources. An internal PLL can also be used by the PIOSC or MOSC clock to generate the system clock and peripheral clocks. Table 4-2 shows how the various clock sources can be used in a system.