SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
GPTM Timer B Interval Load (GPTMTBILR)
When the timer is counting down, this register is used to load the starting count value into the timer. When the timer is counting up, this register sets the upper bound for the timeout event.
When a GPTM is configured to one of the 32-bit modes, the contents of bits 15:0 in this register are loaded into the upper 16 bits of the GPTMTAILR register. Reads from this register return the current value of Timer B and writes are ignored. In a 16-bit mode, bits 15:0 are used for the load value. Bits 31:16 are RESERVED in both cases.
GPTMTBILR is shown in Figure 18-19 and described in Table 18-22.
Return to Summary Table.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| TBILR | |||||||||||||||||||||||||||||||
| R/W-0xFFFF | |||||||||||||||||||||||||||||||