SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Hardware flow control between two devices is accomplished by connecting the UnRTS output to the clear-to-send input on the receiving device, and connecting the request-to-send output on the receiving device to the UnCTS input.
The UnCTS input controls the transmitter. The transmitter may only transmit data when the UnCTS input is asserted (active low). The UnRTS output signal indicates the state of the receive FIFO. UnCTS remains asserted (active low) until the preprogrammed watermark level is reached, indicating that the Receive FIFO has no space to store additional characters.
The UARTCTL register bits 15 (CTSEN) and 14 (RTSEN) specify the flow control mode as shown in Table 26-1.
| CTSEN | RTSEN | Description |
|---|---|---|
| 1 | 1 | RTS and CTS flow control enabled |
| 1 | 0 | Only CTS flow control enabled |
| 0 | 1 | Only RTS flow control enabled |
| 0 | 0 | Both RTS and CTS flow control disabled |
When RTSEN is 1, software cannot modify the UnRTS output value through the UARTCTL register request-to-send (RTS) bit, and the status of the RTS bit should be ignored.