17.3.2.4 HIB Wake Source
GPIO pins K[7:4] on Port K can be configured as an external wake source for the hibernation (HIB) module. The pins can be configured in the following way:
- Write 0x0000.0040 to the HIBCTL register at offset 0x010 to enable 32.768-kHz Hibernation oscillator.
- Write any data to be retained during power cut to the HIBDATA register at offsets 0x030-0x06F.
- Configure the GPIOWAKEPEN and GPIOWAKELVL registers at offsets 0x540 and 0x544 in the GPIO module. Enable the I/O wake pad configuration by writing 0x0000.0001 to the HIBIO register at offset 0x010.
- When the IOWRC bit in the HIBIO register is read as 1, write 0x0000.0000 to the HIBO register to lock the current pad configuration so that any other writes to the GPIOWAKEPEN and GPIOWAKELVL register will be ignored.
- The hibernation sequence may be initiated by writing 0x0000.0052 to the HIBCTL register.
The GPIOWAKESTAT register at offset 0x548 can be read to determine which port caused a wake pin assertion.