SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Hibernation Calendar Load 0 (HIBCALLD0)
The Hibernation Calendar Load (HIBCALLD0) register is used when the CALEN bit is set in the HIBCALCTL register.
NOTE
This register is write-only; any reads to this register read back as zeros. Errant writes to the HIBCALLD0/1 registers are protected by the Hibernate HIBLOCK register.
HIBCALLD0 is shown in Figure 6-24 and described in Table 6-19.
Return to Summary Table.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0x0 | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | AMPM | RESERVED | HR | ||||
R-0x0 | W-0x0 | R-0x0 | W-0x0 | ||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | MIN | ||||||
R-0x0 | W-0x0 | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | SEC | ||||||
R-0x0 | W-0x0 | ||||||