SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
I2C FIFO Control (I2CFIFOCTL)
The FIFO Control Register can be programmed to control various aspects of the FIFO transaction, such as RX and TX FIFO assignment, byte count value for FIFO triggers and flushing of the FIFOs.
I2CFIFOCTL is shown in Figure 19-41 and described in Table 19-31.
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| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RXASGNMT | RXFLUSH | DMARXENA | RESERVED | ||||
| R/W-0x0 | R/W-0x0 | R/W-0x0 | R-0x0 | ||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | RXTRIG | ||||||
| R-0x0 | R/W-0x4 | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| TXASGNMT | TXFLUSH | DMATXENA | RESERVED | ||||
| R/W-0x0 | R/W-0x0 | R/W-0x0 | R-0x0 | ||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | TXTRIG | ||||||
| R-0x0 | R/W-0x4 | ||||||