SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
I2C Master Slave Address (I2CMSA)
This register consists of eight bits: seven address bits (A6-A0), and a Receive/Send bit, which determines if the next operation is a Receive (High), or Transmit (Low).
I2CMSA is shown in Figure 19-16 and described in Table 19-5.
Return to Summary Table.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0x0 | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | SA | R/S | |||||||||||||
R-0x0 | R/W-0x0 | R/W-0x0 | |||||||||||||