SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
The JTAG TAP IR is a four-bit serial scan chain connected between the JTAG TDI and TDO pins with a parallel load register. When the TAP Controller is placed in the correct states, bits can be shifted into the IR. Once these bits have been shifted into the chain and updated, they are interpreted as the current instruction. The decode of the IR bits is shown in Table 3-2. A detailed explanation of each instruction, along with its associated Data Register, follows.
IR[3:0] | Instruction | Description |
---|---|---|
0x0 | EXTEST | Drives the values preloaded into the Boundary Scan Chain by the SAMPLE/PRELOAD instruction onto the pads. |
0x2 | SAMPLE / PRELOAD | Captures the current I/O values and shifts the sampled values out of the Boundary Scan Chain while new preload data is shifted in. |
0x8 | ABORT | Shifts data into the Arm Debug Port Abort Register. |
0xA | DPACC | Shifts data into and out of the Arm DP Access Register. |
0xB | APACC | Shifts data into and out of the Arm AC Access Register. |
0xE | IDCODE | Loads manufacturing information defined by the IEEE Standard 1149.1 into the IDCODE chain and shifts it out. |
0xF | BYPASS | Connects TDI to TDO through a single Shift Register chain. |
All Others | Reserved | Defaults to the BYPASS instruction to ensure that TDI is always connected to TDO. |