20.4 Interrupts
The application can program the LCD controller to trigger an interrupt for the following events:
- DMA end-of-frame 1: The DMA end-of-frame 1 (EOF1) interrupt is triggered when the DMA module has completed transferring the contents of a bounded frame buffer 1.
- DMA end-of-frame 0: The DMA end-of-frame 0 (EOF0) interrupt is triggered when the DMA module has completed transferring the contents of a bounded frame buffer 0.
- DMA palette loaded: When PALMODE is set to Palette-only or Palette+data, the palette loaded interrupt is triggered when the palette portion of the DMA transfer has been stored in the Palette RAM.
- DMA FIFO Underflow: The FIFO Underflow (FIFOU) interrupt is triggered when the real-time output needs to send a value for pixel data but one cannot be found in the FIFO.
- AC Bias Count Decremented to Zero: For Passive Matrix displays, a count can be kept of the number of times the AC Bias line toggles. Once the specified number of transitions has been seen, the AC Bias Count (ACBS) interrupt is triggered. The module does not post any further interrupts or keep counting AC Bias transitions until the interrupt has been cleared.
- Frame synchronization lost: When the DMA module reads a frame buffer and stores it in the FIFO, it sets a start frame and an end frame indicator embedded with the data. On retrieving the data from the FIFO, the Sync Lost (SYNCS) interrupt is triggered if the start indicator is not found at the first pixel of a new frame.
- Recurrent Raster mode frame done: In raster mode, the Recurrent Frame Done (RRASTRDONE) interrupt is triggered each time a complete frame has been sent to the interface pins.
- Raster or LIDD frame done (shared interrupt): In LIDD DMA mode, a frame buffer of data is sent. When the frame buffer has completed, the LIDD Frame Done (DONE) interrupt is triggered. In order to do another LIDD DMA, the DMA engine must be disabled and then re-enabled.
In Raster mode, the interrupt is triggered after LCDEN bit is programmed to 0 in the LCD Raster Control (LCDRASTRCTL) register and after the last frame is sent to the pins. After the Raster mode DMA is running, the interrupt occurs only once after the module is disabled.
The interrupts are enabled in the LCD Interrupt Mask register (LCDIM) register. All pending interrupts in the LCD module must be serviced by the Host's Interrupt Service Routine before it exits.