31-10 |
RESERVED |
R |
0x0 |
|
9 |
EOF1 |
R/W |
0x0 |
DMA End-of-Frame 1 Interrupt Enable Clear. Writing 1 will clear interrupt enable. Writing 0 has no effect. Read indicates enabled status.
0x0 = Disabled
0x1 = Enabled
|
8 |
EOF0 |
R/W |
0x0 |
DMA End-of-Frame 0 Interrupt Enable Clear. Writing 1 will clear interrupt enable. Writing 0 has no effect. Read indicates enabled status.
0x0 = Disabled
0x1 = Enabled
|
7 |
RESERVED |
R |
0x0 |
|
6 |
PALLOAD |
R/W |
0x0 |
DMA Palette Loaded Interrupt Enable Clear. Writing 1 will clear interrupt enable. Writing 0 has no effect. Read indicates enabled status.
0x0 = Disabled
0x1 = Enabled
|
5 |
FIFOU |
R/W |
0x0 |
DMA FIFO Underflow Interrupt Enable Clear. Indicates if LCD dithering logic is not supplying data to the FIFO at a sufficient rate. FIFO has completely emptied and data pin driver logic has attempted to take added data from FIFO. Writing 1 will clear interrupt enable. Writing 0 has no effect. Read indicates enabled status.
0x0 = Disabled
0x1 = Enabled
|
4 |
RESERVED |
R |
0x0 |
|
3 |
ACBS |
R/W |
0x0 |
AC Bias Count Interrupt Enable Clear. For Passive Matrix Panels Only AC bias transition counter has decremented to zero, indicating that the LCDAC line has transitioned the number of times which is specified by the ACBI control bit-field in the LCDRASTRTIMn register. The counter is reloaded with the value in ACBI but it is disabled until the user clears ABCS. Writing 1 will clear interrupt enable. Writing 0 has no effect. Read indicates enabled status.
0x0 = Disabled
0x1 = Enabled
|
2 |
SYNCS |
R/W |
0x0 |
Frame Synchronization Lost Interrupt Enable Clear. Writing 1 will clear interrupt enable. Writing 0 has no effect. Read indicates enabled status.
0x0 = Disabled
0x1 = Enabled
|
1 |
RRASTRDONE |
R/W |
0x0 |
Raster Mode Frame Done Interrupt Enable Clear. Writing 1 will clear interrupt enable. Writing 0 has no effect. Read indicates enabled status.
0x0 = Disabled
0x1 = Enabled
|
0 |
DONE |
R/W |
0x0 |
Raster or LIDD Frame Done (shared, depends on whether Raster or LIDD mode enabled) Interrupt Enable Clear. Writing 1 will clear interrupt enable. Writing 0 has no effect. Read indicates enabled status.
0x0 = Disabled
0x1 = Enabled
|