| 31-10 |
RESERVED |
R |
0x0 |
|
| 9 |
DMACS |
R/W |
0x0 |
CS0/CS1 Select for LIDD DMA writes.
In Motorola 6800 or Intel 8080 synchronous modes, CS1 is not used and thus, DMACS should not be set to 0x1.
0x0 = DMA writes to LIDD CS0 (LCDAC).
0x1 = DMA writes to LIDD CS1 (LCDMCLK).
|
| 8 |
DMAEN |
R/W |
0x0 |
LIDD DMA enable.
0x0 = Deactivate DMA control of LIDD interface. DMA control is released upon completion of transfer of the current frame of data (LIDD Frame Done) when this bit is clear. The microcontroller has direct read and write access to the panel in this mode.
0x1 = Activate DMA to drive LIDD interface to support streaming data to smart panels. The microcontroller cannot access the panel directly in this mode.
Note: When the DMA is enabled, do not read or write the LCD registers for the base and ceiling addresses (LCDDMABAFB0, LCDDMACAFB0, LCDDMABAFB1, and LCDDMACAFB1) with the CPU.
|
| 7 |
CS1E1 |
R/W |
0x0 |
Chip Select 1 (CS1) / Enable 1(E1) Polarity Control. CS1 is active low by default. EN1 is active high by default.
0x0 = CS1/E1 (LCDMCLK) are not inverted. CS1 remains active low and E1 remains active high.
0x1 = Invert CS1/E1 (LCDMCLK). CS1 is active high and E1 is active low.
|
| 6 |
CS0E0 |
R/W |
0x0 |
Chip Select 0 (CS0) / Enable 0 (E0) Polarity Control. CS0 is active low by default. E0 is active high by default.
0x0 = CS0/E0 (LCDAC) are not inverted. CS0 remains active low and E0 remains active high.
0x1 = Invert CS0/E0. CS0 is active high and E0 is active low.
|
| 5 |
WRDIRINV |
R/W |
0x0 |
Write Strobe (WR) / Direction (DIR) Polarity Control. WR active low by default. DIR is write low/read high by default.
0x0 = WR/DIR (LCDLP) are not inverted. WR remains active low and DIR is write low/read high.
0x1 = Invert WR/DIR. WR is active high and DIR is write high/read low.
|
| 4 |
RDEN |
R/W |
0x0 |
Read Strobe (RD) / Direct Enable (EN) Polarity Control. RD is active low by default. EN is active high by default.
0x0 = RD/EN (LCDCP) are not inverted. RD is active low and EN is active high.
0x1 = Invert RD/EN (LCDCP). RD is active high and EN is active low.
|
| 3 |
ALE |
R/W |
0x0 |
Address Latch Enable (ALE) Polarity Control. ALE is active low by default.
0x0 = ALE (LCDFP) is not inverted.
0x1 = Invert ALE (LCDFP). ALE is active high.
|
| 2-0 |
MODE |
R/W |
0x0 |
LIDD Mode Select. Selects type of LCD display interface for the LIDD to drive. See for external pin assignments based on MODE encoding.
0x0 = Synchronous Motorola 6800 Mode
0x1 = Asynchronous Motorola 6800 Mode
0x2 = Synchronous Intel 8080 mode
0x3 = Asynchronous Intel 8080 mode
0x4 = Asynchronous Hitachi mode
0x5 = Reserved
0x6 = Reserved
0x7 = Reserved
|