27.3.5.1 LPM Operation for USB as Device

In order for the USB, acting as a device, to be suspended by the host, the LPM feature must be enabled by configuring the USB LPM Control (USBLPMCNTRL) register. The LPMEN field is used to enable and support the LPM transactions and the TXLPM field is used to instruct the hardware that it is ready to suspend and respond to the next LPM transaction with an ACK. Table 27-1 describes the response to an LPM transaction by the USB device.

For all cases in which the USB device responds (no timeout occurs), an LPM interrupt is generated in the USB LPM Raw Interrupt Status (USBLPMRIS) register. Note that the USB device only responds with an ACK only if there is no data pending in any of the TX Endpoint FIFOs. If there is data pending, it responds with a NYET.

Once an LPM transaction is successfully received, three events occur:

1. The USB LPM Attributes (USBLPMATTR) register is updated with values of the LPM transaction just received. The parameters that are updated are as follows:
   • LINKSTATE: This field tells the USB what state to transition after an LPM transaction. The only valid value for this field is 0x1 which indicates that the USB core should suspend. For any other value, the USB device responds with a STALL and the appropriate interrupt is generated. However, in this case the USBLPMATTR register is updated so that software can observe the non-compliant LPM packet payload. In addition, the ERR interrupt bit is set in the USBLPMRIS register and may be used to generated an interrupt to inform software of the non-compliant LPM transaction
   • HIRD: Host Initiated Resume Duration. This field tells the USB the minimum duration that the host will drive resume signalling on the bus. This field represents a resume duration range from 50 µs to 1200 µs. This value may be different for subsequent LPM transactions.
   • RMTWAK: This bit indicates if the remote wakeup by the USB is allowed. This bit applies to the current suspend and resume cycle only and may be different for subsequent LPM transactions. The RMTWAK bit should not supersede the wakeup capability that was previously negotiated on enumeration of the USB.
2. The USB device suspends 9 µs after transmitting the ACK. Resume signaling can be driven by the host or the USB 50 µs after this event. During this 9 µs interval, the host may continue to transmit the LPM transaction. The USB responds with an ACK in this case regardless of the TXLPM value in the USBLPMCNTRL register.
3. An interrupt is generated informing software of the response (an ACK in this case). An ACK response is the indication to software that the USB has suspended.

Since the primary purpose of LPM is to save power, the software reads the USBLPMATTR register to determine the attributes of the Suspend. Software must make a determination based on these attributes whether additional power savings in the system can be exploited. In making this determination it is noted that if the host initiates the resume signalling, the USB is required to respond to packet transmissions within the time specified by HIRD + 10us.

When the host resumes the bus, it drives resume signalling for a minimum time specified by the HIRD field in the USBLPMATTR register. The USB must be able to respond to traffic within the time HIRD + 10us. The USB transitions to a normal operating state automatically and a resume interrupt bit is set in the USB LPM Raw Interrupt Status (USBLPMRIS) register. However for this to occur, the System Clock and the input signal USB0CLK must be enabled. To facilitate the resume timing requirement, an additional feature, NAK, is provided in the USBLPMCNTRL register. If NAK is set to 0x1, all endpoints respond to any transaction (other then an LPM) with a NAK. This bit only takes effect after the USB has LPM suspended. Typically, this bit would be asserted when the TXLPM field is also asserted. Using this feature may simplify the resume timing requirement because only XCLK is needed for the USB to respond (with a NAK) to traffic. Software can continue to restore the system to normal operation while the USB responds to all transactions with a NAK. After the system has been completely restored, software can then clear the NAK field is the USBLPMCNTRL register.

If the software wants to initiate a remote wakeup while the USB is in Suspend mode, it should write a 0x1 to the RES bit in the USBLPMCNTRL register. This bit is self clearing. Writing a 0x1 causes resume signaling to be driven on the bus for 50 µs. The host responds by driving resume for 60 µs to 990 µs. 10 µs after the host stops driving resume, the USB transitions to its normal operational state and is ready for packet transmission. A resume interrupt bit is set in the USBLPMRIS register.