SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
If the RA bit is set in the Ethernet MAC Frame Filter (EMACFRAMEFLTR) register, offset 0x004, the MAC Receive Frame Controller initiates the data transfer to the RX FIFO as soon as four bytes of Ethernet data are received. At the end of the data transfer, the received frame status that includes the frame filter bits (SA or DA filter fail) and status are also sent. These bits indicate to the application whether the received frame has passed the filter controls. This module does not drop any frame on its own in this mode.
If the RA bit is clear, the MAC Receive Frame Controller performs frame filtering based on the destination/source address (the application still needs to perform another level of filtering if it decides not to receive any bad frames like runt, CRC error frames, etc.) After receiving the destination or source address bytes, the MAC Receive Frame Controller checks the filter-fail sign for an address match. On detecting a filter-fail, the frame is dropped and not transferred to the application.
NOTE
When the PMT module is configured for power-down mode, all received frames are dropped and not forwarded to the application.