9.4.1.3.1.1 Main Sequence: AES Polling Mode
Figure 9-12 shows AES polling mode. The registers used in AES polling mode are:
- AES Data RW Plaintext/Ciphertext 0 (AES_DATA_IN_0) registers, offset 0x060 to 0x06C
- AES Control (AES_CTRL) register, offset 0x050
- AES Hash Tag Out 0 (AES_TAG_OUT_0), offset 0x070