22.5.8 ONEWIREICR Register (Offset = 0x10C) [reset = 0x0]
1-Wire Interrupt Clear (ONEWIREICR), offset 0x10C
The 1-Wire Interrupt Clear (ONEWIREICR) register is used to clear the ONEWIRERIS register (and by extension, the ONEWIREMIS register).When read, this register contains the same value as the ONEWIRERIS register. To clear current interrupts, read this register and write the results back.
ONEWIREICR is shown in Figure 22-14 and described in Table 22-12.
Return to Summary Table.
Figure 22-14 ONEWIREICR Register
| 31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
| RESERVED |
| R-0x0 |
|
| 23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| RESERVED |
| R-0x0 |
|
| 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
| RESERVED |
| R-0x0 |
|
| 7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| RESERVED |
DMA |
STUCK |
NOATR |
OPC |
RST |
| R-0x0 |
W1C-0x0 |
W1C-0x0 |
W1C-0x0 |
W1C-0x0 |
W1C-0x0 |
|
Table 22-12 ONEWIREICR Register Field Descriptions
| Bit |
Field |
Type |
Reset |
Description |
| 31-5 |
RESERVED |
R |
0x0 |
|
| 4 |
DMA |
W1C |
0x0 |
DMA Done Interrupt Clear. Writing a 1 to this bit clears the DMA bit in the ONEWIRERIS register and the DMA bit in the ONEWIREMIS register.
|
| 3 |
STUCK |
W1C |
0x0 |
Stuck Status Interrupt Clear. Writing a 1 to this bit clears the STUCK bit in the ONEWIRERIS register and the STUCK bit in the ONEWIREMIS register.
|
| 2 |
NOATR |
W1C |
0x0 |
No Answer-to-Reset Interrupt Clear. Writing a 1 to this bit clears the NOATR bit in the ONEWIRERIS register and the NOATR bit in the ONEWIREMIS register.
|
| 1 |
OPC |
W1C |
0x0 |
Operation Complete Interrupt Clear. Writing a 1 to this bit clears the OPC bit in the ONEWIRERIS register and the OPC bit in the ONEWIREMIS register.
|
| 0 |
RST |
W1C |
0x0 |
Reset Interrupt Clear. Writing a 1 to this bit clears the RST bit in the ONEWIRERIS register and the RST bit in the ONEWIREMIS register.
|