SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Synchronous Serial Interface Peripheral Ready (PRSSI)
The PRSSI register indicates whether the SSI modules are ready to be accessed by software following a change in status of power, run mode clocking, or reset. A power change is initiated if the corresponding PCSSI bit is changed from 0 to 1. A run mode clocking change is initiated if the corresponding RCGCSSI bit is changed. A reset change is initiated if the corresponding SRSSI bit is changed from 0 to 1.
The PRSSI bit is cleared on any of the preceding events and is not set again until the module is completely powered, enabled, and internally reset.
PRSSI is shown in Figure 4-182 and described in Table 4-210.
Return to Summary Table.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0x0 | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | R3 | R2 | R1 | R0 | |||||||||||
R-0x0 | R-0x0 | R-0x0 | R-0x0 | R-0x0 | |||||||||||