SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Micro Direct Memory Access Run Mode Clock Gating Control (RCGCDMA)
The RCGCDMA register lets software enable and disable the µDMA module in run mode. When enabled, the module is provided a clock, and accesses to module registers are allowed. When disabled, the clock is disabled to save power, and accesses to module registers generate a bus fault.
NOTE
This register controls the clocking for the µDMA module.
RCGCDMA is shown in Figure 4-94 and described in Table 4-101.
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0x0 | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | R0 | ||||||||||||||
R-0x0 | R/W-0x0 | ||||||||||||||