| 31-20 |
RESERVED |
R |
0x0 |
|
| 19 |
LDOUA |
R |
0x0 |
LDO Update Active
0x0 = The LDO voltage level is not changing.
0x1 = The LDO voltage level is changing.
|
| 18 |
FLASHLP |
R |
0x0 |
Flash Memory in Low Power State
0x0 = The flash memory is currently in the active state.
0x1 = The flash memory is currently in the low power state as programmed in the SLPPWRCFG or DSLPPWRCFG register.
|
| 17 |
LOWPWR |
R |
0x0 |
Sleep or Deep-Sleep Mode
0x0 = The microcontroller is currently in run mode.
0x1 = The microcontroller is currently in sleep or deep-sleep mode and is waiting for an interrupt or is in the process of powering up. The status of this bit is not affected by the power state of the flash memory or SRAM.
|
| 16 |
PRACT |
R |
0x0 |
Sleep or Deep-Sleep Power Request Active
0x0 = A power request is not active.
0x1 = The microcontroller is currently in deep-sleep mode or is in sleep mode and a request to put the SRAM or flash memory into a lower-power mode is currently active as configured by the SLPPWRCFG register.
|
| 15-8 |
RESERVED |
R |
0x0 |
|
| 7 |
PPDW |
R |
0x0 |
PIOSC Power Down Request Warning
0x0 = No error.
0x1 = This bit indicates that the PIOSC was not powered off even though the PIOSCPD bit was set in the DSLCLKCFG register because the PIOSC was in use by a peripheral.
|
| 6 |
LMAXERR |
R |
0x0 |
VLDO Value Above Maximum Error
0x0 = No error.
0x1 = An error has occurred because software has requested that the LDO voltage be above the maximum value allowed using the VLDO bit in the LDOSPCTL, or LDODPCTL register. In this situation, the LDO is set to the factory default value.
|
| 5 |
RESERVED |
R |
0x0 |
|
| 4 |
LSMINERR |
R |
0x0 |
VLDO Value Below Minimum Error in Sleep Mode
0x0 = No error.
0x1 = An error has occurred because software has requested that the LDO voltage be below the minimum value allowed using the VLDO bit in the LDOSPCTL register. In this situation, the LDO voltage is not changed when entering sleep mode.
|
| 3 |
LDMINERR |
R |
0x0 |
VLDO Value Below Minimum Error in Deep-Sleep Mode
0x0 = No error.
0x1 = An error has occurred because software has requested that the LDO voltage be below the minimum value allowed using the VLDO bit in the LDODPCTL register. In this situation, the LDO voltage is not changed when entering deep-sleep mode.
|
| 2 |
PPDERR |
R |
0x0 |
PIOSC Power Down Request Error
0x0 = No error.
0x1 = An error has occurred because software has requested that the PIOSC be powered down during deep sleep and it is not possible to power down the PIOSC. In this situation, the PIOSC is not powered down when entering deep-sleep mode.
|
| 1 |
FPDERR |
R |
0x0 |
Flash Memory Power Down Request Error
0x0 = No error.
0x1 = An error has occurred because software has requested a flash memory power down mode that is not available using the FLASHPM field in the SLPPWRCFG or the DSLPPWRCFG register.
|
| 0 |
SPDERR |
R |
0x0 |
SRAM Power Down Request Error
0x0 = No error.
0x1 = An error has occurred because software has requested an SRAM power down mode that is not available using the SRAMPM field in the SLPPWRCFG or the DSLPPWRCFG register.
|