SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Software flow control between two devices is accomplished by using interrupts to indicate the status of the UART. Interrupts may be generated for the UnDSR, UnDCD, UnCTS, and UnRI signals using bits 3:0 of the UARTIM register, respectively. The raw and masked interrupt status may be checked using the UARTRIS and UARTMIS register. These interrupts may be cleared using the UARTICR register.