23.5.1 SSICR0 Register (Offset = 0x0) [reset = 0x0]
QSSI Control 0 (SSICR0), offset 0x000
The SSICR0 register contains bit fields that control various functions within the QSSI module. Functionality such as protocol mode, clock rate, and data size are configured in this register.
SSICR0 is shown in Figure 23-10 and described in Table 23-6.
Return to Summary Table.
Figure 23-10 SSICR0 Register
| 31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| RESERVED |
| R-0x0 |
|
| 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| SCR |
SPH |
SPO |
FRF |
DSS |
| R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
|
Table 23-6 SSICR0 Register Field Descriptions
| Bit |
Field |
Type |
Reset |
Description |
| 31-16 |
RESERVED |
R |
0x0 |
|
| 15-8 |
SCR |
R/W |
0x0 |
QSSI Serial Clock Rate. This bit field is used to generate the transmit and receive bit rate of the QSSI. The bit rate is:
BR = SysClk / (CPSDVSR * (1 + SCR))
where CPSDVSR is an even value from 2 to 254 programmed in the SSICPSR register, and SCR is a value from 0 to 255. |
| 7 |
SPH |
R/W |
0x0 |
QSSI Serial Clock Phase. This bit is only applicable to the Freescale SPI Format. The SPH control bit selects the clock edge that captures data and allows it to change state. This bit has the most impact on the first bit transmitted by either allowing or not allowing a clock transition before the first data capture edge.
0x0 = Data is captured on the first clock edge transition.
0x1 = Data is captured on the second clock edge transition.
|
| 6 |
SPO |
R/W |
0x0 |
QSSI Serial Clock Polarity
0x0 = A steady state low value is placed on the SSInClk pin.
0x1 = A steady state high value is placed on the SSInClk pin when data is not being transferred.If this bit is set, then software must also configure the GPIO port pin corresponding to the SSInClk signal as a pullup in the GPIO Pullup Select (GPIOPUR) register.
|
| 5-4 |
FRF |
R/W |
0x0 |
QSSI Frame Format Select. When operating in Advanced, Bi-, or Quad-SSI mode these bits must be 0x0.
0x0 = Freescale SPI Frame Format
0x1 = Texas Instruments Synchronous Serial Frame Format
0x02 = Reserved
0x03 = Reserved
|
| 3-0 |
DSS |
R/W |
0x0 |
QSSI Data Size Select. When operating in Advanced, Bi- or Quad-SSI, data size can only be 8-bit. All other fields will be ignored.
0x0 = Reserved
0x1 = Reserved
0x2 = Reserved
0x3 = 4-bit data
0x4 = 5-bit data
0x5 = 6-bit data
0x6 = 7-bit data
0x7 = 8-bit data
0x8 = 9-bit data
0x9 = 10-bit data
0xA = 11-bit data
0xC = 13-bit data
0xD = 14-bit data
0xE = 15-bit data
0xF = 16-bit data
|