SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
The timer compare mode is an extension to the existing one-shot and periodic modes of the GPTM. This mode can be used when an application requires a pin change state at some time in the future, regardless of the processor state. The compare mode does not operate when the PWM mode is active and is mutually exclusive to the PWM mode. The compare mode is enabled when the TAMR field is set to 0x1 or 0x2 (one-shot or periodic), the TnAMS bit is 0 (capture or compare mode) and the TCACT field is nonzero in the GPTM Timer n Mode (GPTMTnMR) register. Depending on the TCACT encoding, the timer can perform a set, clear or toggle on the corresponding CCPn pin when a timer match occurs. In 16-bit mode, the corresponding CCP pin can have an action applied, but when operating in 32-bit mode, the action can only be applied to the even CCP pin.
The TCACT field can be changed while the GPTM is enabled to generate different combinations of actions. For example, during a periodic event, encodings TCACT = 0x6 or 0x7 can be used to force the initial state of the CCPn pin before the first interrupt and following that, TCACT = 0x2 and TCACT = 0x3 can be used (alternately) to change the sense of the pin for the subsequent toggle, while possible changing load value for the next period.
The time-out interrupts used for one-shot and periodic modes are used in the compare action modes. Thus, the TnTORIS bits in the GPTMRIS register are triggered if the appropriate mask bits are set in the GPTMIM register.