| 31-18 |
RESERVED |
R |
0x0 |
|
| 17 |
DMATXIC |
W1C |
0x0 |
Transmit DMA Interrupt Clear.
Writing a 1 to this bit clears the DMATXRIS bit in the UARTRIS register and the DMATXMIS bit in the UARTMIS register. |
| 16 |
DMARXIC |
W1C |
0x0 |
Receive DMA Interrupt Clear.
Writing a 1 to this bit clears the DMARXRIS bit in the UARTRIS register and the DMARXMIS bit in the UARTMIS register. |
| 15-13 |
RESERVED |
R |
0x0 |
|
| 12 |
9BITIC |
R/W |
0x0 |
9-Bit Mode Interrupt Clear.
Writing a 1 to this bit clears the 9BITRIS bit in the UARTRIS register and the 9BITMIS bit in the UARTMIS register. |
| 11 |
EOTIC |
W1C |
0x0 |
End of Transmission Interrupt Clear.
Writing a 1 to this bit clears the EOTRIS bit in the UARTRIS register and the EOTMIS bit in the UARTMIS register. |
| 10 |
OEIC |
W1C |
0x0 |
Overrun Error Interrupt Clear.
Writing a 1 to this bit clears the OERIS bit in the UARTRIS register and the OEMIS bit in the UARTMIS register. |
| 9 |
BEIC |
W1C |
0x0 |
Break Error Interrupt Clear.
Writing a 1 to this bit clears the BERIS bit in the UARTRIS register and the BEMIS bit in the UARTMIS register. |
| 8 |
PEIC |
W1C |
0x0 |
Parity Error Interrupt Clear.
Writing a 1 to this bit clears the PERIS bit in the UARTRIS register and the PEMIS bit in the UARTMIS register. |
| 7 |
FEIC |
W1C |
0x0 |
Framing Error Interrupt Clear.
Writing a 1 to this bit clears the FERIS bit in the UARTRIS register and the FEMIS bit in the UARTMIS register. |
| 6 |
RTIC |
W1C |
0x0 |
Receive Time-Out Interrupt Clear.
Writing a 1 to this bit clears the RTRIS bit in the UARTRIS register and the RTMIS bit in the UARTMIS register. |
| 5 |
TXIC |
W1C |
0x0 |
Transmit Interrupt Clear.
Writing a 1 to this bit clears the TXRIS bit in the UARTRIS register and the TXMIS bit in the UARTMIS register. |
| 4 |
RXIC |
W1C |
0x0 |
Receive Interrupt Clear.
Writing a 1 to this bit clears the RXRIS bit in the UARTRIS register and the RXMIS bit in the UARTMIS register. |
| 3 |
DSRMIC |
W1C |
0x0 |
UART Data Set Ready Modem Interrupt Clear Writing a 1 to this bit clears the DSRRIS bit in the UARTRIS register and the DSRMIS bit in the UARTMIS register.
|
| 2 |
DCDMIC |
W1C |
0x0 |
UART Data Carrier Detect Modem Interrupt Clear.
Writing a 1 to this bit clears the DCDRIS bit in the UARTRIS register and the DCDMIS bit in the UARTMIS register. |
| 1 |
CTSMIC |
W1C |
0x0 |
UART Clear to Send Modem Interrupt Clear.
Writing a 1 to this bit clears the CTSRIS bit in the UARTRIS register and the CTSMIS bit in the UARTMIS register. |
| 0 |
RIMIC |
W1C |
0x0 |
UART Ring Indicator Modem Interrupt Clear.
Writing a 1 to this bit clears the RIRIS bit in the UARTRIS register and the RIMIS bit in the UARTMIS register. |